Add additional registers
This commit is contained in:
parent
cb771ba762
commit
7ac990a06c
|
|
@ -219,9 +219,69 @@ package Interfaces.RP2040.PIO is
|
||||||
end record
|
end record
|
||||||
with Volatile, Full_Access_Only;
|
with Volatile, Full_Access_Only;
|
||||||
|
|
||||||
|
for INSTR_MEM_Type use
|
||||||
|
record
|
||||||
|
Mem at 0 range 0 .. 15;
|
||||||
|
Reserved at 0 range 16 .. 31;
|
||||||
|
end record;
|
||||||
|
|
||||||
type Array_INSTR_MEM is array (Natural range <>) of INSTR_MEM_Type
|
type Array_INSTR_MEM is array (Natural range <>) of INSTR_MEM_Type
|
||||||
with Component_Size => 32;
|
with Component_Size => 32;
|
||||||
|
|
||||||
|
type SM_CLKDIV_Type is
|
||||||
|
record
|
||||||
|
Reserved : Bit_8;
|
||||||
|
Frac : Bit_8;
|
||||||
|
Int : Bit_16;
|
||||||
|
end record
|
||||||
|
with Volatile, Full_Access_Only;
|
||||||
|
|
||||||
|
for SM_CLKDIV_Type use
|
||||||
|
record
|
||||||
|
Reserved at 0 range 0 .. 7;
|
||||||
|
Frac at 0 range 8 .. 15;
|
||||||
|
Int at 0 range 16 .. 31;
|
||||||
|
end record;
|
||||||
|
|
||||||
|
type Array_SM_CLKDIV is array (Natural range <>) of SM_CLKDIV_Type
|
||||||
|
with Component_Size => 32;
|
||||||
|
|
||||||
|
type SM_EXECCTRL_Type is
|
||||||
|
record
|
||||||
|
STATUS_N : Bit_4;
|
||||||
|
STATUS_SEL : Bit_1;
|
||||||
|
Reserved_5_6 : Bit_2;
|
||||||
|
Wrap_Bottom : Bit_5;
|
||||||
|
Wrap_Top : Bit_5;
|
||||||
|
Out_Sticky : Bit_1;
|
||||||
|
Inline_Out_En : Bit_1;
|
||||||
|
Out_EN_SEL : Bit_5;
|
||||||
|
JMP_Pin : Bit_5;
|
||||||
|
Side_Pindir : Bit_1;
|
||||||
|
Side_EN : Bit_1;
|
||||||
|
EXEC_Stalled : Bit_1;
|
||||||
|
end record
|
||||||
|
with Volatile, Full_Access_Only;
|
||||||
|
|
||||||
|
for SM_EXECCTRL_Type use
|
||||||
|
record
|
||||||
|
STATUS_N at 0 range 0 .. 3;
|
||||||
|
STATUS_SEL at 0 range 4 .. 4;
|
||||||
|
Reserved_5_6 at 0 range 5 .. 6;
|
||||||
|
Wrap_Bottom at 0 range 7 .. 11;
|
||||||
|
Wrap_Top at 0 range 12 .. 16;
|
||||||
|
Out_Sticky at 0 range 17 .. 17;
|
||||||
|
Inline_Out_En at 0 range 18 .. 18;
|
||||||
|
Out_EN_SEL at 0 range 19 .. 23;
|
||||||
|
JMP_Pin at 0 range 24 .. 28;
|
||||||
|
Side_Pindir at 0 range 29 .. 29;
|
||||||
|
Side_EN at 0 range 30 .. 30;
|
||||||
|
EXEC_Stalled at 0 range 31 .. 31;
|
||||||
|
end record;
|
||||||
|
|
||||||
|
type Array_SM_EXECCTRL is array (Natural range <>) of SM_EXECCTRL_Type
|
||||||
|
with Component_Size => 32;
|
||||||
|
|
||||||
type PIO_Type is
|
type PIO_Type is
|
||||||
record
|
record
|
||||||
CTRL : CTRL_Type;
|
CTRL : CTRL_Type;
|
||||||
|
|
@ -240,6 +300,8 @@ package Interfaces.RP2040.PIO is
|
||||||
with Volatile, Full_Access_Only;
|
with Volatile, Full_Access_Only;
|
||||||
DBG_CFGINFO : DBG_CFGINFO_Type;
|
DBG_CFGINFO : DBG_CFGINFO_Type;
|
||||||
INSTR_MEM : Array_INSTR_MEM (0 .. 31);
|
INSTR_MEM : Array_INSTR_MEM (0 .. 31);
|
||||||
|
SM_CLKDIV : Array_SM_CLKDIV (0 .. 3);
|
||||||
|
SM_EXECCTRL : Array_SM_EXECCTRL (0 .. 3);
|
||||||
end record;
|
end record;
|
||||||
|
|
||||||
PIO_0 : PIO_Type
|
PIO_0 : PIO_Type
|
||||||
|
|
|
||||||
|
|
@ -13,7 +13,10 @@ package Interfaces
|
||||||
with Size => 5;
|
with Size => 5;
|
||||||
type Bit_6 is mod 2**6
|
type Bit_6 is mod 2**6
|
||||||
with Size => 6;
|
with Size => 6;
|
||||||
|
type Bit_7 is mod 2**7
|
||||||
|
with Size => 7;
|
||||||
|
type Bit_8 is mod 2**8
|
||||||
|
with Size => 8;
|
||||||
type Bit_10 is mod 2**10
|
type Bit_10 is mod 2**10
|
||||||
with Size => 10;
|
with Size => 10;
|
||||||
|
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue
Block a user